Part Number Hot Search : 
PMWD16UN PEB20590 A0100 25002 LBS12202 MAX602 1N4745 74AHC1G
Product Description
Full Text Search
 

To Download ISL88016 Datasheet File

  If you can't view the Datasheet, Please click here to try to view without PDF Reader .  
 
 


  Datasheet File OCR Text:
  1 ? fn6141.0 caution: these devices are sensitive to electrosta tic discharge; follow proper ic handling procedures. 1-888-intersil or 1-888-468-3774 | intersil (and design) is a registered trademark of intersil americas inc. copyright intersil americas inc. 2006. all rights reserved all other trademarks mentioned are the property of their respective owners. ISL88016, isl88017 6-pin voltage supervisors with pin- selectable voltage trip points the ISL88016, isl88017 supervisors offer pin-selectable voltage trip points along with popular functions such as power-on reset control, supply voltage supervision, and manual reset assertion in a small 6 ld tsot-23 package. by connecting the th ree vset pins to v dd , gnd or floating, users can program the voltage tr ip point from 1.60v to 2.85v in 50mv increments on the ISL88016 and from 2.15v to 4.65v in 100mv increments on the isl88017. these user- selectable reset threshold voltages are accurate to 2% over temperature and the reset signal is valid down to 1v. intersil?s proprietary twinpin? combines the active low reset out with the manual reset input into one pin. this provides device adjustability without sacr ificing functionality. these parts are specifically designed for low power consumption and high threshold accuracy. pinout ISL88016, isl88017 (6 ld tsot-23) top view features ? pin-selectable single voltage monitoring supervisors ? user pin-selectable voltage trip points - ISL88016 : 1.60v to 2.85v in 50mv steps - isl88017 : 2.15v to 4.65v in 100mv steps ? reduce inventory on fixed voltage trip point options ? manual reset capability ? proprietary twinpin? combines active-low reset output and manual reset input functions into one pin ? reset signal valid down to v dd = 0.8v ? voltage threshold 2% accuracy over temp ? no external components necessary ? immune to power-supply transients ? ultra low 3a supply current ? small 6 ld tsot-23 pb-free plus anneal available (rohs compliant) applications ? process control systems ? intelligent instruments ? embedded control systems ? computer systems ? portable/battery-powered equipment ? pda and hand-held pc devices rst /mr gnd vset1 v dd 1 2 3 5 4 ISL88016 vset3 vset2 isl88017 6 ordering information part number (note) part marking tape & reel package (pb-free) pkg. dwg. # ISL88016ihtz-t 016z 3k pcs 6 ld tsot-23 tape & reel mdp0049 isl88017ihtz-t 017z 3k pcs 6 ld tsot-23 tape & reel mdp0049 ISL88016ihtz-tk 016z 1k pcs 6 ld tsot-23 tape & reel mdp0049 isl88017ihtz-tk 017z 1k pcs 6 ld tsot-23 tape & reel mdp0049 ISL88016/17eval1z evaluation platform note: intersil pb-free plus anneal pr oducts employ special pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are rohs compliant and compatible with both snpb and pb-free soldering operations. intersil pb-free products are msl classified at pb-free peak reflow temperatures that meet or exceed the pb-free requirements of ipc/jedec j std-020. data sheet december 22, 2006
2 fn6141.0 december 22, 2006 functional block diagrams v ref v dd por rst /mr pb gnd ISL88016 v dd isl88017 voltage setting vset1 vset2 vset3 product features table function ISL88016 isl88017 active-low reset (rst ) xx manual reset input (mr ) xx 1.60v to 2.85v (50mv increments) pin-selectable voltage trip range x 2.15v to 4.65v (100mv increments) pin-selectable voltage trip range x pb-free package option available xx pin descriptions pin name function 1 v dd supply voltage and monitored input. the v dd pin is the ic power supply terminal and also the monitored input. the voltage at this pin is compared against the programmed voltage trip point, v tp . a reset is first asserted when the device is init ially powered up to ensure that the power supply has stabilized. thereafter, reset is again asserted whenever v dd falls below v th . the device is designed with hysteresis to help prevent chattering due to noise and is immune to brief power-supply transients. 2 gnd ground. 3 vset1 voltage trip point select pins 1, 2 and 3. these inputs are either tied either to gnd or v dd or left floating in various combinations to program the fa lling voltage trip point. see voltage trip point setting table on following page for pr ogramming configurations. 4 vset2 5 vset3 6 rst /mr proprietary twinpin? technology combines ac tive-low reset output and manual reset input functions into one pin. this dual function pin fu nctions as both the reset output and a manual reset input. the rst output pin has an integrated 100k pull-up resistor to v dd that is pulled to gnd (low) when reset is asserted, v dd < programmed voltage trip point. the mr input is an active-low debounced input to which a user can connect a push-button to add manual reset capability. ISL88016, isl88017
3 fn6141.0 december 22, 2006 power-on reset voltage setting v th vset1 vset2 vset3 ISL88016 isl88017 1.60 2.15 gnd gnd gnd 1.65 2.25 float gnd gnd 1.70 2.35 v dd gnd gnd 1.75 2.45 gnd float gnd 1.80 2.55 float float gnd 1.85 2.65 v dd float gnd 1.90 2.75 gnd v dd gnd 1.95 2.85 float v dd gnd 2.00 2.95 v dd v dd gnd 2.05 3.05 gnd gnd float 2.10 3.15 float gnd float 2.15 3.25 v dd gnd float 2.20 3.35 gnd float float 2.25 3.45 float float float 2.30 3.55 v dd float float 2.35 3.65 gnd v dd float 2.40 3.75 float v dd float 2.45 3.85 v dd v dd float 2.50 3.95 gnd gnd v dd 2.55 4.05 float gnd v dd 2.60 4.15 v dd gnd v dd 2.65 4.25 gnd float v dd 2.70 4.35 float float v dd 2.75 4.45 v dd float v dd 2.80 4.55 gnd v dd v dd 2.85 4.65 float v dd v dd reserved reserved v dd v dd v dd ISL88016, isl88017
4 fn6141.0 december 22, 2006 absolute maximum ratings recommended operating conditions temperature under bias . . . . . . . . . . . . . . . . . . . . .-40c to +125c storage temperature . . . . . . . . . . . . . . . . . . . . . . .-65c to +150c voltage on any pin with respect to gnd . . . . . . . . . . . -1.0v to +7v d.c. output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5ma lead temperature (soldering, 10s) . . . . . . . . . . . . . . . . . . . . +300c temperature range (industrial) . . . . . . . . . . . . . . . . .-40c to +85c caution: absolute maximum ratings indicate limits beyond whic h permanent damage to the device and impaired reliability may occu r. these are stress ratings provided for information only and functional operation of the de vice at these or any other conditions beyond those indicated in the operational sections of this specification are not implied. for guaranteed specifications and test condi tions, see electrical specifications. the guaranteed specifications apply only for the test conditions listed. some performance characteristics may degrade when the device is not operated under the listed test conditions. electrical specifications over the recommended operating conditi ons unless otherwise specified. symbol parameter test conditions min typ max units bias v dd supply voltage range 1.6 5.5 v i dd ISL88016 supply current v dd > v th v dd = 5.0v 4.3 6 a v dd = 3.3v 3.1 4.9 a v dd = 2.5v 3.1 4.5 a v dd = 1.8v 2.5 4.4 a isl88017 supply current v dd > v th v dd = 5.0v 4.0 8.5 a v dd = 3.3v 3.2 8.5 a v dd = 2.5v 3.2 6.5 a v dd = 2.25v 3.0 5.4 a voltage threshold v th v dd voltage trip point see power-on reset voltage setting table on page 3 -2 +2 % v thhyst hysteresis at vth input temperature = +25c 1% reset v ol ISL88016 reset output voltage low v dd < v th, sinking 0.225ma 0.20 0.5 v isl88017 reset output voltage low v dd < v th, sinking 0.225ma 0.20 0.5 v v oh reset output voltage high v dd > v th v dd v t por por time-out delay 140 200 280 ms t rst v th low to reset asserted delay v dd open 0.01 s c load load capacitance on reset pin 5 pf manual reset v mr mr input voltage 100 mv t mr mr minimum pulse width 10 s r pu integrated rst /mr pull-up resistor 100 k vset i vset vset current 1a v vset vset open pin voltage vset = open 0.5v dd v v il vset input voltage low 0.1v dd v v ih vset input voltage high 0.9 x v dd v ISL88016, isl88017
5 fn6141.0 december 22, 2006 principles of operation the ISL88016 and isl88017 devices provides a low cost solution for those voltage monitoring applications needing supply voltage supervision with power reset control, and manual reset assertion. by integrating these common features along with three pins of vth programming into a small 6 ld tsot-23 package and using only 1a of supply current, the ISL88016 and isl88017 devices can lower system cost, reduce board space requirements, and increase the reliability of a system while reducing inventory overhead costs. low voltage monitoring during normal operation, the ISL88016 and isl88017 monitor the voltage level of v dd . the device asserts a reset (rst = low) if this voltage is less than the programmed voltage trip point. the reset signal prevents system operation during a power failure or brownout condition. this reset signal remains asserted until v dd exceeds the voltage threshold setting for the reset time delay period t por . (see figure 1). the ISL88016 and isl88017 allo w users to customize the power-on reset voltage threshold level, which is the voltage at which the reset is deasse rted. the three vset inputs are either tied to v dd , gnd or left open to program v th . see the power-on reset voltage setting table on page 3 for specific voltage configuration. also see figure 2 for a schematic representation of the vset pins being programmed, noting the minimum necessary components for ic operation. do not attempt to reprogram a v th while the ic is biased. power-on reset (por) applying power to the ISL88016 and isl88017 activates a por circuit which a sserts reset once v dd = 1 v. (i.e., rst goes low). this provides several benefits: ? it prevents the system microprocessor from starting to operate with insufficient voltage. ? it prevents the processor from operating prior to stabilization of the oscillator. ? it ensures that the monitored device is held out of operation until internal registers are properly loaded. ? it allows time for an fpga to download its configuration prior to initialization of the circuit. the reset signal remains asserted until v dd rises above the minimum voltage sense level for time period t por . this ensures that the v dd voltage has stabilized. optional v dd de-coupling capacitance can be added to filter transients if needed. figure 1. voltage monitoring timing diagram v dd mr v th / v por 1v >t mr rst t por t por t por t rst ISL88016 vset1 isl88017 figure 2. setting v por using vset inputs vset2 vset3 gnd v dd rst /mr ISL88016, isl88017
6 fn6141.0 december 22, 2006 manual reset the manual reset input (mr ) allows the user to trigger a reset by using a push-button switch. the mr input is an active low debounced input. by connecting a push-button directly from mr to ground, the designer adds manual system reset capability (see figu re 3). reset is asserted if the mr pin is pulled low to less than 100mv for 10s or longer while the push-button is closed. after mr is released, the reset outputs remain asserted for t por (200ms) and then released. using the ISL88016/17eval1z platform the ISL88016/17eval1z platform is provided with both an ISL88016 in the top and an isl88017 in the bottom positions. each ic is defaul t programmed to vset1, vset2 and vset3 = float but provid ed with jumpers to change the vth level by individually connecting the three vset pins to either v dd (1) or gnd (0). to the left of the circuits is a vset programming table for easy reference. provide adequate bias to v dd to deassert reset signal. see figure 4 for the ISL88016/17eval1z schematic and figure 5 for its photograph. rst /mr pb ISL88016 isl88017 figure 3. connecting a manual reset push-button figure 4. ISL88016/17eval1z schematic figure 6. sampled v th % to target over temp figure 7. i dd over temp figure 8. t por over temp figure 5. ISL88016/17eval1z photograph -1.3 -1.1 -0.9 -0.7 -0.5 -0.3 -0.1 0.1 -40-30-20-10 0 1025354555657585 temperature (oc) vdd vth (%) target 0% 88017_3.55v 88017_4.55v 88017_2.25v 88016_2.25v 88016_2.80v 88016_1.75v temperature (c) 0.00 1.00 2.00 3.00 4.00 5.00 6.00 -40-30-20-10 0 1025354555657585 temperature ( o c) bias current (ua) v dd = 2.5v v dd = 5v v dd = 1.8v v dd = 3.3v 193 194 195 196 197 198 199 200 201 202 203 204 -40-30-20-100 1025354555657585 temperature ( o c) t por (ms) v dd = 5v v dd = 3.3v ISL88016, isl88017
7 all intersil u.s. products are manufactured, asse mbled and tested utilizing iso9000 quality systems. intersil corporation?s quality certifications ca n be viewed at www.intersil.com/design/quality intersil products are sold by description only. intersil corpor ation reserves the right to make changes in circuit design, soft ware and/or specifications at any time without notice. accordingly, the reader is cautioned to verify that data sheets are current before placing orders. information furnishe d by intersil is believed to be accurate and reliable. however, no responsibility is assumed by intersil or its subsidiaries for its use; nor for any infringements of paten ts or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of intersil or its subsidiari es. for information regarding intersil corporation and its products, see www.intersil.com fn6141.0 december 22, 2006 ISL88016, isl88017 tsot package family e1 n a d e 4 (n/2) 2 1 e1 0.15 d c 2x 0.25 c 2x n/2 tips e b ddd m d c a-b b nx 6 2 3 5 seating plane 0.10 c nx 1 3 c d 0.15 a-b c 2x a2 a1 h c (l1) l 0.25 4 4 gauge plane a mdp0049 tsot package family symbol tsot5 tsot6 tsot8 tolerance a 1.00 1.00 1.00 max a1 0.05 0.05 0.05 0.05 a2 0.87 0.87 0.87 0.03 b 0.38 0.38 0.29 0.07 c 0.127 0.127 0.127 +0.07/-0.007 d 2.90 2.90 2.90 basic e 2.80 2.80 2.80 basic e1 1.60 1.60 1.60 basic e 0.95 0.95 0.65 basic e1 1.90 1.90 1.95 basic l 0.40 0.40 0.40 0.10 l1 0.60 0.60 0.60 reference ddd 0.20 0.20 0.13 - n 5 6 8 reference rev. a 12/02 notes: 1. plastic or metal protrusions of 0.15mm maximum per side are not included. 2. plastic interlead protrusions of 0.15mm maximum per side are not included. 3. this dimension is measured at datum plane ?h?. 4. dimensioning and tolerancing per asme y14.5m-1994. 5. index area - pin #1 i.d. will be located within the indicated zone (tsot6 and tsot8 only). 6. tsot5 version has no center lead (shown as a dashed line).


▲Up To Search▲   

 
Price & Availability of ISL88016

All Rights Reserved © IC-ON-LINE 2003 - 2022  

[Add Bookmark] [Contact Us] [Link exchange] [Privacy policy]
Mirror Sites :  [www.datasheet.hk]   [www.maxim4u.com]  [www.ic-on-line.cn] [www.ic-on-line.com] [www.ic-on-line.net] [www.alldatasheet.com.cn] [www.gdcy.com]  [www.gdcy.net]


 . . . . .
  We use cookies to deliver the best possible web experience and assist with our advertising efforts. By continuing to use this site, you consent to the use of cookies. For more information on cookies, please take a look at our Privacy Policy. X